Ensure that the ADC switches are configured when LVDS is enabled

We are seeing high voltages (~5.9V) on the FEE/ADC's 5vp, low voltages on 12vp (~10.8V), and excess current (heat) in bad places, notably the ADCs.

Steve Hope found "The problem is caused by the integrator, and becomes evident as soon as the LVDS is enabled. Enabling the LVDS allows the integrator to start integrating toward the 12V rail. This results in the output of the integrator being pegged at close to rail voltage. The output is then driven into the ADC via a 150 Ohm resistor. This causes current from the 12V volt supply (via the output of the op amp) to shunted to the 5V supply of the ADC, presumably by protection diodes on the input pin. The net result is that the 12V is pulled down while 5V is pushed up."

JEG then prescribed "If the system is OK when LVDS_EN is off,
they `all' we have to do is to make sure that ASW1 and ASW2
are in the state that turns OFF their respective switches on
the ADC board and ASW3 is in the state that turns ON its
switch, so the integrator is held in reset before we enable
the LVDS (and less importantly, the input switches are open)."

This should come down to actively driving I+ high, and I- and IR low before enable the FEE LVDS power. Shouldn't be hard.