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        <build-number>803005</build-number>
        <build-date>13-09-2019</build-date>
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<item>
            <title>[INSTRM-868] Require that FPGA be controllable before enabling FEE voltages.</title>
                <link>https://pfspipe.ipmu.jp/jira/browse/INSTRM-868</link>
                <project id="10300" key="INSTRM">Instrument control development</project>
                    <description>&lt;p&gt;The polarity of the switches on the new ADC should protect the integrator on power-up. But we should still toggle their state carefully.&lt;/p&gt;

&lt;p&gt;The current xcu_fpga code allows the fee to be initialized without the FPGA. The warning must be changed to a failure, unless a specific override is given.&lt;/p&gt;</description>
                <environment></environment>
        <key id="14154">INSTRM-868</key>
            <summary>Require that FPGA be controllable before enabling FEE voltages.</summary>
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                                            <priority id="10000" iconUrl="https://pfspipe.ipmu.jp/jira/images/icons/priorities/medium.svg">Normal</priority>
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                                    <resolution id="-1">Unresolved</resolution>
                                        <assignee username="cloomis">cloomis</assignee>
                                    <reporter username="cloomis">cloomis</reporter>
                        <labels>
                            <label>SPS</label>
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                <created>Thu, 19 Dec 2019 00:43:11 +0000</created>
                <updated>Fri, 14 Jan 2022 20:41:59 +0000</updated>
                                                                            <component>ics_xcu_fpga</component>
                        <due></due>
                            <votes>0</votes>
                                    <watches>1</watches>
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