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        <version>8.3.4</version>
        <build-number>803005</build-number>
        <build-date>13-09-2019</build-date>
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<item>
            <title>[INSTRM-1043] Fix usage of ADC bits for old FPGA/ADCs.</title>
                <link>https://pfspipe.ipmu.jp/jira/browse/INSTRM-1043</link>
                <project id="10300" key="INSTRM">Instrument control development</project>
                    <description>&lt;p&gt;The configuration bits which control which 16-bit window to select from the 18-bit ADC outputs are being misused. The FPGA code for the new (sm2+) ADCs drops support for the old 16-bit ADCs, but the C code which controls both old and new ADCs allows setting the configuration to enable 16-bit support in the old ADCs, and swapped the usage of two of the bits. Not a problem for the new ADCs, but bad for the old ones.&lt;/p&gt;

&lt;p&gt;A two-line fix plus a comment. Needed for SM1 at Subaru until the ADCs get swapped.&lt;/p&gt;</description>
                <environment></environment>
        <key id="14641">INSTRM-1043</key>
            <summary>Fix usage of ADC bits for old FPGA/ADCs.</summary>
                <type id="1" iconUrl="https://pfspipe.ipmu.jp/jira/secure/viewavatar?size=xsmall&amp;avatarId=10503&amp;avatarType=issuetype">Bug</type>
                                            <priority id="10000" iconUrl="https://pfspipe.ipmu.jp/jira/images/icons/priorities/medium.svg">Normal</priority>
                        <status id="10002" iconUrl="https://pfspipe.ipmu.jp/jira/images/icons/statuses/generic.png" description="The issue is resolved, reviewed, and merged">Done</status>
                    <statusCategory id="3" key="done" colorName="green"/>
                                    <resolution id="10000">Done</resolution>
                                        <assignee username="cloomis">cloomis</assignee>
                                    <reporter username="cloomis">cloomis</reporter>
                        <labels>
                            <label>SM1</label>
                            <label>SPS</label>
                    </labels>
                <created>Tue, 28 Jul 2020 16:33:19 +0000</created>
                <updated>Tue, 28 Jul 2020 21:09:44 +0000</updated>
                            <resolved>Tue, 28 Jul 2020 21:09:44 +0000</resolved>
                                                                        <due></due>
                            <votes>0</votes>
                                    <watches>1</watches>
                                                                <comments>
                            <comment id="17478" author="cloomis" created="Tue, 28 Jul 2020 21:09:44 +0000"  >&lt;p&gt;&quot;Two-line fix&quot; Yes, well.&lt;/p&gt;

&lt;p&gt;I ended up changing the way ADC versions and modes are tracked, with humans limited to requesting &quot;lsb&quot;, &quot;mid&quot;, msb&quot; bits, and the CCD object mapping those to the correct FPGA bits. The mapping depends on the FPGA version, which is something which the CCD object knows about. The ADC version cannot be different from the major FPGA version, so we only need to worry about one, which we can read from hardware.&lt;/p&gt;

&lt;p&gt;This pretty much takes care of a couple of other issues, which I will set to Won&apos;t Fix.&lt;/p&gt;

&lt;p&gt;ics_xcu_fpga: merged at e293a8a, tagged 82.1.1&lt;br/&gt;
ics_ccdActor: merged at 8267fea, tagged 1.6.7&lt;/p&gt;

&lt;p&gt;Both running at Subaru and JHU.&lt;/p&gt;</comment>
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