[INSTRM-868] Require that FPGA be controllable before enabling FEE voltages. Created: 19/Dec/19 Updated: 15/Jan/22 |
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| Status: | Open |
| Project: | Instrument control development |
| Component/s: | ics_xcu_fpga |
| Affects Version/s: | None |
| Fix Version/s: | None |
| Type: | Task | Priority: | Normal |
| Reporter: | cloomis | Assignee: | cloomis |
| Resolution: | Unresolved | Votes: | 0 |
| Labels: | SPS | ||
| Remaining Estimate: | Not Specified | ||
| Time Spent: | Not Specified | ||
| Original Estimate: | Not Specified | ||
| Story Points: | 2 |
| Sprint: | SM1PD-2019 E, SM1PD-2020 A, SM1PD-2020 B, SM1PD-2020 C, SM1PD-2020 K |
| Description |
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The polarity of the switches on the new ADC should protect the integrator on power-up. But we should still toggle their state carefully. The current xcu_fpga code allows the fee to be initialized without the FPGA. The warning must be changed to a failure, unless a specific override is given. |