[INSTRM-496] Add mechanism to read back current clock state, or remember the final one. Created: 25/Sep/18 Updated: 25/Sep/18 |
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| Status: | Open |
| Project: | Instrument control development |
| Component/s: | ics_xcu_fpga |
| Affects Version/s: | None |
| Fix Version/s: | None |
| Type: | Task | Priority: | Normal |
| Reporter: | cloomis | Assignee: | cloomis |
| Resolution: | Unresolved | Votes: | 0 |
| Labels: | None | ||
| Remaining Estimate: | Not Specified | ||
| Time Spent: | Not Specified | ||
| Original Estimate: | Not Specified | ||
| Description |
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The clocking engine in the FPGA was designed to wipe or readout the CCD, and there is no mechanism to read the current clocking state back. We could remember the last mask sent, and clear that on reset. |