Rephrase FPGA 18->16 bit modes

The ADC generates 18-bit pixels and the FPGA selects 16 of those. With the new ADC we have removed the old 16-bit mode and added a mode to select the bottom 16-bits of the pixel. This works, but the names of the variables, etc. are now completely wrong and quite confusing. This is on the FPGA code, the PCI register bit definition, and the calling C code.

Really not hard, but should be in own ticket. Marking as Minor since it is currently functional.